Design Of Superscalar SHA-1 & SHA-2 MIPS Processor Using FPGA

Abstract

According to the wide developments in the area of communications, there is a demand for secure system for data transmissions. Hash function has important usage in the cryptography for information security. Cryptographic hash functions are used to protect information integrity and authenticity in a wide range of applications. In this paper, a Hash system SHA-1 and SHA-2 Processor is designed using Xilinx Spartan-3AN. The implementation of the processor is done by using Superscalar MIPS Processor (Microprocessor without Interlocked Pipelines) single cycle by choosing a certain number of instructions that are necessary to invoke the SHA-1, SHA-224, SHA-256, SHA-384 and SHA-512 algorithms.